The present invention relates to a semiconductor film having a crystalline structure formed on a substrate with an insulating surface and to a method for its fabrication, as well as to semiconductor devices employing the semiconductor film as an active layer and to a method for their fabrication. The invention particularly relates to a thin film transistor having an active layer formed with a crystalline semiconductor film. Throughout the present specification, xe2x80x9csemiconductor devicexe2x80x9d will refer generally to a device that functions by utilizing semiconductor properties, and this includes electrooptical devices typically including active-matrix type liquid crystal display devices formed using thin film transistors, as well as electronic devices having such electrooptical devices as mounted members thereof.
Thin film transistors (hereunder abbreviated to TFTs) have been developed that possess crystalline semiconductor films as active layers, obtained by forming amorphous semiconductor films on translucent insulating substrates such as glass and crystallizing them by laser annealing, heat annealing or the like. The principal substrates used for fabrication of such TFTs are glass substrates consisting of barium borosilicate glass or aluminoborosilicate glass. Such glass substrates have poorer heat resistance than quartz substrates but have a lower market price, and therefore offer the advantage of allowing easier manufacture of large-sized substrates.
Laser annealing is known as a crystallizing technique that can accomplish crystallization by applying high energy only onto the amorphous semiconductor film, without significantly increasing the temperature of the glass substrate. In particular, excimer lasers obtained by shortwave light output are thought to be most suited for this use. Laser annealing using excimer lasers is carried out by using an optical system to process a laser beam into a spot or line onto an irradiating surface, and scanning the irradiating surface with the processed laser light (moving the laser light irradiation position relative to the irradiating surface). For example, excimer laser annealing employing linear laser light can accomplish laser annealing of an entire irradiating surface by scanning simply in the lengthwise direction and the direction perpendicular thereto, and because of its excellent productivity it has become the main manufacturing technique for liquid crystal display devices employing TFTs.
Laser annealing can be applied for crystallization of many types of semiconductor materials. From the standpoint of TFT properties, however, the use of a crystalline silicon film as the active layer is thought to be suitable since this allows a high degree of mobility to be realized. This technique was used to achieve a monolithic liquid crystal display device having a pixel TFT forming an image section on one glass substrate and a driving circuit TFT provided around the image section.
However, crystalline silicon films fabricated by laser annealing are aggregates of multiple crystal grains whose locations and sizes are random, and therefore it has not been possible to deliberately form crystal grains at desired locations. Consequently, it has been virtually impossible to use single crystal grains to form TFT channel-forming regions, for which crystallinity is most crucial. At the interface between the crystal grains (grain boundaries), the, influence of the potential level at the recrystallization centers, trapping centers or crystal grain boundaries, which is a cause of amorphous structure or crystal defects, has resulted in reduced carrier current conveying characteristics. Because of this, the TFTs using crystalline silicon films as active layers obtained to date have not exhibited properties equivalent to those of MOS transistors fabricated on single crystal silicon substrates.
As a method of solving this problem, it has been considered an effective means to increase the crystal grain size while controlling the locations of the crystal grains to eliminate the crystal grain boundaries from the channel-forming region. For example, in xe2x80x9cLocation Control of Large Grain Following Excimer-Laser Melting of Si Thin-Filmsxe2x80x9d, R. Ishihara and A. Burtsev, Japanese Journal of Applied Physics vol.37, No.3B, pp.1071-1075, 1998xe2x80x9d there is disclosed a method for three-dimensional control of silicon film temperature distribution to achieve location control and large grain sizes of crystals. According to this method, excimer laser light is irradiated onto both sides of a wafer comprising a high-melting-point metal formed as a film on a glass substrate, a silicon oxide film with a different film thickness partially formed thereover and an amorphous silicon film formed on the surface thereof, whereby it is reported that the crystal grain size can be increased to a few xcexcm.
The aforementioned method of Ishihara et al. is characterized by locally altering the heat characteristics of the underlying material of the amorphous silicon film, in order to control the flow of heat to the substrate to introduce a temperature gradient. However, this requires formation of a three-layer structure of a high-melting-point metal layer/silicon oxide layer/semiconductor film on the glass substrate. While it is structurally possible to form a top gate-type TFT with the semiconductor film as the active layer, the parasitic capacitor generated between the semiconductor film and the high-melting-point metal layer increases the power consumption, thus creating a problem against realization of a high-speed operation TFT.
On the other hand, if the high-melting-point metal layer also serves as a gate electrode, it can be effectively applied to a bottom gate-type or inversed stagger-type TFT. However, in the aforementioned three-layer structure, even if the thickness of the semiconductor film is eliminated, the film thickness of the high-melting-point metal layer and the silicon oxide layer will not necessarily match the film thickness suited for the crystallization step and the film thickness suited for the characteristics as a TFT element, such that it is impossible to simultaneously satisfy the optimum design for the crystallization step and the optimum design for the element structure.
Furthermore, when a non-translucent high-melting-point metal layer is formed over the entire surface of a glass substrate it is not possible to fabricate a transmitting liquid crystal display device. The high-melting-point metal layer is useful in terms of its high thermal conductivity, but the chrome (Cr) film or titanium (Ti) film that is typically used as the high-melting-point metal material exhibits a high internal stress, and therefore often produces problems of cohesion with the glass substrate. The effect of the internal stress reaches to the semiconductor film formed on the top layer, and presents a concern of acting as a force causing distortion in the formed crystalline semiconductor film.
The present invention is a technique designed to overcome such problems, whereby a crystalline semiconductor film with controlled crystal grain locations and sizes is fabricated, and the crystalline semiconductor film is used in a TFT channel-forming region to realize a TFT allowing high-speed operation. It is also an object of the invention to provide a technique whereby such a TFT can be applied to various semiconductor devices such as transmitting liquid crystal display devices and image sensors.
A means for solving the problems described above will now be explained with reference to FIG. 1. A translucent, insulating thermal conductive layer 2 is provided in close contact with the main surface of a substrate 1, and an insular or stripe-shaped first insulating layer 3 is formed in a selected region of the thermal conductive layer. A second insulating layer 4 and semiconductor film 5 are laminated thereover. First, the semiconductor film 5 is formed using a semiconductor film with an amorphous structure (amorphous semiconductor film). The first insulating layer 3 and second insulating layer 4 provide a function for control of the flow rate of heat to the thermal conductive layer 2. The second insulating layer 4 may also be absent. In any case, the amorphous semiconductor film 5 is continuously formed in the region of the substrate in which the first insulating layer 3 is formed as well as the other regions.
The semiconductor film 5 formed with the amorphous structure is crystallized into a crystalline semiconductor film. The crystallization step is most preferably carried out by laser annealing. An excimer laser light source with a laser light output at a wavelength of 400 nm or lower is particularly preferred since it allows preferential heating of the semiconductor film. The excimer laser used may be a pulse oscillation type or continuous emission type. The light irradiated onto the semiconductor film 5 may be a linear beam, spot beam, sheet beam or the like depending on the optical system, and there are no limitations on its shape. The specific laser annealing conditions may be appropriately determined by the operator, but the crystallization step according to the invention is generally carried out using a reaction of transition from a molten to solid-phase state, as described below.
In laser annealing, the conditions for the irradiated laser light (or laser beam) are optimized for heat melting of the semiconductor film, for control of the crystal nucleus generated density and the crystal growth from the crystal nucleus. In FIG. 1, region A delineated by the broken lines is the region on the thermal conductive layer 2 on which the first insulating layer 3 is formed. Region B indicates the surrounding region where the first insulating layer 3 is not formed. The pulse width of the excimer laser is from a few nsec to a few dozen nsec, such as 30 nsec, and therefore irradiation at a pulse oscillation frequency of 30 Hz results in instantaneous heating of the semiconductor film by the pulse laser light with a cooling time that is slightly longer than the heating time. The semiconductor film is melted by the laser light irradiation, but since the volume increases in region A by the amount of formation of the first insulating layer, the temperature increase is lower than in region B. On the other hand, since the heat diffuses through the thermal conductive layer 2 immediately after cessation of the laser light irradiation, region B begins to cool more rapidly and is converted to solid phase, whereas region A cools in a relatively milder fashion.
The crystal nucleus is assumed to be produced and formed by the cooling process from melted state to solid phase state, but the nucleus generating density is correlated with the melted state temperature and the cooling rate, and based on experimental observations, rapid cooling from high temperature has tended to result in a higher nucleus generating density. Consequently, the crystal nucleus generating density in region B, which undergoes rapid cooling from the melted state, is higher than in region A, and random generation of crystal nuclei forms multiple crystal grains, resulting in relatively smaller grain sizes than the crystal grains produced in region A. On the other hand, by optimizing the laser light irradiation conditions and the first insulating layer 3 and second insulating layer 4 in region A, it is possible to control the melted state temperature and the cooling rate in order to cause one generated crystal nucleus to grow into a large-sized crystal.
Lasers allowing such crystallization also include solid state lasers that are typically YAG lasers, HYO4 lasers or YLF lasers. Such solid state lasers are preferably laser diode excitation lasers, with a second harmonic (532 nm), third harmonic (354.7 nm) and fourth harmonic (266 nm). The irradiation conditions may be a pulse oscillation frequency of 1-10 kHz, and a laser energy density of 300-600 mJ/cm2 (typically 350-500 mJ/cm2). Also, the entire surface of the substrate is irradiated with the laser beam converged into a line with a width of 100-1000 xcexcm, or 400 xcexcm, for example. The superposition (overlap) of the linear laser light is 80-98%.
The crystallization step need not necessarily employ laser annealing alone, and a combination of heat annealing and laser annealing may also be used. For example, after crystallization of the amorphous semiconductor film by initial heat annealing, it may be further irradiated with laser light to form the crystalline semiconductor film. The heat annealing used may be a crystallization method using a catalyst element.
In this crystallization step, the materials used for the thermal conductive layer 2 formed in close contact with the main surface of the substrate and for the first insulating layer 3 and second insulating layer 4, and their film thicknesses, must be carefully selected for the purpose of controlling the transience of the thermal conductivity. The thermal conductive layer must be of a material with a thermal conductivity of at least 10 Wmxe2x88x921Kxe2x88x921 at ordinary temperature. Such materials that may be used include compounds containing one or more different components selected from among aluminum oxide, aluminum nitride, aluminum oxynitride, silicon nitride and boron nitride. Alternatively, there may be used compounds containing Si, N, O and M (where M is Al or at least one species selected from among rare earth elements).
On the other hand, the first insulating layer 3 and second insulating layer 4 employ a material with a thermal conductivity of less than 10 Wmxe2x88x921Kxe2x88x921 at ordinary temperature. A silicon oxynitride film is preferred as a material having such a thermal conductivity and being suitable as a ground layer for the TFT formed on the glass substrate. A silicon nitride film or silicon oxide film may, of course, be used alternatively. However, the most preferred material is a silicon oxynitride film fabricated from SiH4 and N2O by plasma CVD, for formation of the first insulating film 3 or second insulating film 4, and this composition may have an oxygen concentration of from 55 atomic % to 70 atomic % and a nitrogen concentration of from 1 atomic % to 20 atomic %.
The first insulating layer 3 is likewise formed in an insular or striped divided pattern in alignment with the position of the active layer of the TFT (the semiconductor film on which are formed the channel-forming region, source region, drain region and LDD region) on the glass substrate. Its size may be a submicron size of 0.35xc3x970.35 xcexcm2 (channel lengthxc3x97channel length) to match the size of the TFT, for example, or it may be 8xc3x978 xcexcm2, 8xc3x97200 xcexcm2 or 12xc3x97400 xcexcm2. By forming the first insulating layer 3 to match the location and size of the TFT channel-forming region, it is possible to form the channel-forming region with one crystal grain of the crystalline semiconductor film formed thereover. That is, it the same structure is obtained as by forming the channel-forming region with substantially a single crystal layer. Here, the angle of the side wall at the edge of said first insulating layer with the main surface of said substrate is preferably between 10xc2x0 and 40xc2x0.
By utilizing this phenomenon, it is possible to achieve large-sized crystal grains present on the crystalline semiconductor film. The locations of the crystal grains can also be aligned with the locations forming the TFT active layer.